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Intel life outside the traditional CMOS process technology

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Intel life outside the traditional CMOS process technology

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Almost all semiconductor plants and industrial industrial equipment for manufacturing microchips use the so-called CMOS technology (CMOS).  Soon the resources laid in the CMOS process technology will exhaust itself.  This will be expressed in the impossibility of creating sufficiently small elements on the chip for a reasonable cost of production modernization.  The barrier is expected in the region of 2-3 nm.

To increase the performance of transistors and to reduce consumption, new materials and new transistor structures will have to be used.  At the same time, it is impossible to give up that huge mass of factory equipment, faithfully and truly, the "riveting" chips yesterday, today, tomorrow.  In this, the main problem is to combine completely new structural computing units and the CMOS process technology.  

At the symposium International Symposium on Physical Design (ISPD 2017) in March, Intel representative said that the main task for the company sees the reduction of the gate driver of the transistors voltage significantly below the threshold level of 0.5 V. A decade of work in this direction using CMOS technology produced very little .  Now Intel considers more than ten options for new structures to solve the problem.

All new variants rely on four basic variants of variables that can be used in computational logic: the electron charge, the electric dipole (spin), the magnetic spin, and the orbital state of the group of elements.  For all cases, the company and the researchers conduct an analysis of possible delays and power consumption for switching.  Before the practical implementation will be years.  The main thing is that there are options, and they are considered with all possible bias.

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Intel life outside the traditional CMOS process technology

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